Efforts in the design of integrated circuits for radio frequency (RF) communication systems generally focus on improving performance, reducing cost or a combination thereof. One area of increasing interest relates to conversion of signals, such as from analog-to-digital or digital-to-analog. Both types of conversion have benefited from the development and use of delta-sigma modulation.
Delta-sigma modulation is a technique used to generate a very high fidelity (e.g., low noise) estimate of a signal using a small number of quantization levels and a very high sampling rate. Limiting a signal to a finite number of levels introduces significant “quantization” noise into the system. Oversampling and the use of an integrator feedback-loop in delta-sigma modulation are effective in shifting noise, primarily quantization noise, to out-of-band frequencies. The noise shifting properties enable efficient use of subsequent filtering stages to remove noise and produce a more precise representation of the input.
There is generally a compromise between bandwidth and dynamic range in analog-to-digital converter (ADC) technology. ADCs with the widest dynamic range generally compromise on the smallest signal they can successfully convert in the presence of quantization noise or spurious signals due to non-linearities. There is also generally a tradeoff between the bandwidth, or conversion speed, of an ADC and the amount of circuitry required. For many applications, the maximum performance of a component is needed for only a small fraction of the operations space. Much of the time, another performance aspect would be better emphasized. In other applications the requirement for small quantification noise only applies to a subset of the input signals; whereas a larger noise level can be tolerated for the remaining input signals.